Joint Hardware Attack Subgroup (JHAS)

J
HAS develops, maintains, and continuously enhances the methodology used to assess attack paths in security IC hardware, as well as embedded security firmware and software. JHAS provides guidance on interpreting this rating methodology and actively monitors the latest advancements in attack techniques. The group ensures consistent application of the methodology across security evaluations, spanning from low attack potential (AVA_VAN.2) to high attack potential (AVA_VAN.5). Additionally, JHAS defines the minimum laboratory requirements for JHAS-qualified labs.

JHAS plays a critical role in high-assurance security evaluations for secure ICs, including smart cards, secure elements, secure processing units, and enclaves within SoCs and related technologies. It also supports evaluations of associated security and cryptographic firmware, security IC operating systems, and security applications.

Comprising global experts from European Cyber Security Frameworks, JHAS includes certification bodies, security certification schemes, evaluation facilities, developers, and end users. The group contributes to the security community by publishing and consulting on the attack rating methodology and its interpretation.

By harmonizing attack evaluation methods and ratings, JHAS establishes a fair and standardized framework for all stakeholders. This alignment empowers certification schemes, policymakers, and users to rigorously assess the security solutions they adopt, both in existing and emerging domains.

Terms of Reference:

to be updated

Technical Group leaders:

Sebastien Colle, Infineon
Chairman

Markus Hinkelmann, NXP
Vice-chairman